cMIPS is a synthesizable VHDL model for the 5-stage pipeline, MIPS32r2 core.
The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is a complete implementation of the MIPS32r2 instruction set.
The model was synthesized for an Altera EP4CE30F23. The model runs at 50 MHz (top board speed) and uses up 15% of the combinational blocks and 5% of the logic registers on the FPGA.
Processor model runs C code, compiled with GCC; there are scripts to compile and assemble code to run on the simulator or the FPGA.
Core has all forwarding paths and interlocks for data and control hazards.
Coprocessor0 supports six hardware interrupts + NMI in "Interrupt Compatibility Mode" and an 8-way fully associative TLB. The control instructions break, syscall, trap, mfc0, mtc0, eret, ei, di, ll, sc are fully implemented.
Partial-word loads and stores (word, half-word, byte) implemented at the processor's memory interface.
Testbench includes processor, RAM, ROM and (simulator) file I/O.
Top level file for synthesis includes processor, RAM, ROM, LCD display controller, 2x7segment LED display, keypad and UART. SDRAM controller, VGA interface and Ethernet port are in the works.
An stdlib lookalike is in the works, as well as a port of Xinu.
The floating point operations are being implemented.
The project is hosted here. A more complete description can be found at docs/cMIPS.pdf, in the repository.
To clone the repository do
git -c http.sslVerify=false clone https://gitlab.c3sl.ufpr.br/roberto/cmips.git
To run the simulations you need to install ghdl from Sourceforge. As of May 2015, there is no Debian package for the VHDL compiler.
To compile and assemble code for the MIPS processor on an x86 PC, you need to install binutils plus a GCC cross-compiler. To do that, follow the instructions in cMIPS/docs/installCrosscompiler.
Once you have ghdl and gcc installed, go to cMIPS/tests and run doTests.sh. If the output is a list of names, then the fun may begin. Otherwise, please do send an e-mail to roberto at inf . ufpr . br with the error message.